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June 1996
NDT454P P-Channel Enhancement Mode Field Effect Transistor
General Description
Power SOT P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
-5.9A, -30V. RDS(ON) = 0.05 @ VGS = -10V RDS(ON) = 0.07 @ VGS = -6V RDS(ON) = 0.09 @ VGS = -4.5V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package.
____________________________________________________________________________________________
D
D
G
D
S
G
S
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD
T A = 25C unless otherwise noted
NDT454P -30 20
(Note 1a)
Units V V A
5.9 15
Maximum Power Dissipation
(Note 1a) (Note 1b) (Note 1c)
3 1.3 1.1 -65 to 150
W
TJ,TSTG
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
42 12
C/W C/W
* Order option J23Z for cropped center drain lead.
(c) 1997 Fairchild Semiconductor Corporation
NDT454P Rev. D2
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -24 V, VGS = 0 V VDS = -15 V, VGS = 0 V Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = -250 A VGS = -10 V, ID = -5.9 A VGS = -6 V, ID = -5.2 A VGS = -4.5 V, ID = -4.6 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = -10 V, VDS = -5 V VGS = -4.5, VDS = -5V Forward Transconductance VDS = 15 V, ID = 5.9 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 950 610 220 pF pF pF -15 -5 10 S -1 -2.7 0.038 0.046 0.064 0.05 0.07 0.09 A TJ = 70C -30 -1 -5 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Static Drain-Source On-Resistance V
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -15 V, ID = -5.9 A, VGS = -10 V VDD = -15 V, ID = -1 A, VGEN = -10 V, RGEN = 6 10 18 80 45 29 3 11 30 60 120 100 40 ns ns ns ns nC
NDT454P Rev. D2
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max -1.9
(Note 2)
Units A V ns
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD trr
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time VGS = 0 V, IS = -5.9 A -0.85
-1.3 100
VGS = 0V, IF = -5.9 A, dIF/dt = 100 A/s
P D(t) =
R JA(t)
T J -TA
=
T J -TA R JC+RC (t ) A
= I 2 (t) x RDS(ON ) D
TJ
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 42oC/W when mounted on a 1 in2 pad of 2oz copper. b. 95oC/W when mounted on a 0.066 in2 pad of 2oz copper. c. 110oC/W when mounted on a 0.0123 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDT454P Rev. D2
Typical Electrical Characteristics
-30 3
VGS =-10V
I D , DRAIN-SOURCE CURRENT (A)
-25
-6.0
-4.5 -4.0
RDS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-5.0
2.5
V GS = -3.5V -4.0V -4.5V -5.0V
-20
2
-15
-3.5
-10
1.5
-6.0V
1
-3.0
-5
-10V
0 0 -1 -2 -3 -4 V DS , DRAIN-SOURCE VOLTAGE (V) -5
0.5 0 -4 -8 -12 I D , DRAIN CURRENT (A) -16 -20
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6
2 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE
RDS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE
1.4
I D = -5.9A VGS = -10V
V GS = -10V
1.5
TJ = 125C
1.2
1
25C
1
0.8
-55C
0.6 -50
0.5 -25 0 25 50 75 100 125 150 0 -5 T , JUNCTION TEMPERATURE (C) J -10 I D , DRAIN CURRENT (A) -15 -20
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
-20
1.2
V DS = -10V
-16
T = -55C J
25
GATE-SOURCE THRESHOLD VOLTAGE
125
V DS = V GS
1.1
-ID , DRAIN CURRENT (A)
I D = -250A
V th , NORMALIZED
1
-12
0.9
-8
0.8
-4
0.7
0 -1 -2 -3 -4 -VGS , GATE TO SOURCE VOLTAGE (V) -5
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDT454P Rev. D2
Typical Electrical Characteristics (continued)
1.1 20
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50
-I S , REVERSE DRAIN CURRENT (A)
I D = -250A
10 5
VGS = 0V
BV DSS , NORMALIZED
1
TJ = 125C 25C
0.1
-55C
0.01
0.001 -25 0 TJ 25 50 75 100 125 150 0 0.3 0.6 0.9 1.2 1.5 , JUNCTION TEMPERATURE (C) -VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature.
3000 2000 , GATE-SOURCE VOLTAGE (V)
10
I D = -5.9A
8
V
DS
= -10V
-15V
-20V
CAPACITANCE (pF)
1000
C iss C oss
6
500 300 200
4
f = 1 MHz VGS = 0 V
C rss
100 0.1
-V 0 1 3 10 30 0
0.3
GS
2
10
20 Q g , GATE CHARGE (nC)
30
40
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
-VDD
t d(on)
ton
t off tr
90%
t d(off)
90%
V IN
D
RL V OUT
VOUT
10%
tf
VGS
R GEN
10% 90%
G
DUT
S
V IN
10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDT454P Rev. D2
Typical Electrical and ThermalCharacteristics (continued)
3.5
g FS, TRANSCONDUCTANCE (SIEMENS)
20
T J = -55C 25C
STEADY-STATE POWER DISSIPATION (W)
V DS = -15V
16
1a
3
2.5
12
125C
8
2
1.5
1b 1c
4
1
4.5"x5" FR-4 Board TA = 2 5 C Still Air
o
0 0 -5 -10 I D , DRAIN CURRENT (A) -15 -20
0.5 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. SOT-223 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
30 10 -I D, DRAIN CURRENT (A)
RD S(O N) LIM IT
7 I D , STEADY-STATE DRAIN CURRENT (A)
6
1a
10 0u 1m s s 10 10 ms s
3 1 0.3
5
0m
4
1c
1b
VGS = -10V
0.1
1s 10 s DC
SINGLE PULSE R
J A
3
4.5"x5" FR-4 Board TA = 2 5 C Still Air VG S = - 1 0 V
o
= See Note 1c
0.03 0.01 0.1
T A = 25C
0.5 1 2 5 10 30 50
2 0
0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 )
1
0.2
- VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 15. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
1 0.5
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.05 0.02 0.01
Figure 16. Maximum Safe Operating Area.
0.2 0.1 0.05 0.02 0.01 0.005
R JA (t) = r(t) * R JA R JA = See Note 1 c
P(pk)
t1
t2
Single Pulse
TJ - TA = P * R
0.002 0.001 0.0001 0.001 0.01 0.1 t 1 , TIME (sec) 1 10
(t) JA Duty Cycle, D = t 1 / t 2
100 300
Figure 15. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.
NDT454P Rev. D2

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